Welcome to my Personal Webpage
I am a third year PhD Student under Prof. Mahdi Nazm Bojnordi in the School of Computing in University of Utah. I am broadly interested in the fields of Computer Architecture, and my research specifically focuses on Hardware Acceleration of performance critical applications and Novel Memory Systems
Hardware Acceleration of Machine Learning - currently working on developing a novel data representation to reduce bandwidth and computational complexity of Convolutional Neural Networks (CNNs)
High Bandwidth Cross Caching - Developed a novel reconfigurable memristor based memory with high bandwidth efficiency, with capability of large scale parallel search. Demonstrated cache/scratchpad reconfigurability, high lifetime and achieved 50% and 12x improvement over state-of-the-art High Bandwidth memory, over Cache and Hash Table/Stringmatch applications respectively.
Memristive Ranking In Memory - Identified bandwidth bottleneck issues with sorting kernels, and proposed propose a viable hardware/software mechanism for performing large-scale data ranking in ReRAM based memory with a bandwidth complexity of O(1), by reformulating sorting operations as bit-level in-situ operations. Achieved 12.4 - 50.7x throughput gains for high-performance parallel sorting kernels and 2.3 - 43.6x improvements in a set of database applications, with 90% energy reduction. Submitted to HPCA 2021
Reconfigurable Transistors - Did a survey of TIGFET, an emerging reconfigurable nanotechnology and qualified it’s implication for computer architects. Published as blogpost in ACM Sigarch.
Teaching Mentor with Prof. Ryan Stutsman for Graduate Level Operating Systems (CS 6460) in Spring 2020
Teaching Mentor with Prof. Mahdi Bojnordi for Undergraduate Level Computer Organization (CS 3810) in Fall 2020
Implemented and validated Worst Case Execution Time (WCET) analysis over the REDEFINE hardware for validation of safety-critical application execution.
Implemented an Alexnet CNN model for car-parking occupancy detection. The initial model was done using Caffe with optimal hyperparameters, which gave an accuracy of 98.6 with 25 FPS. The whole model was subsequently ported onto Tiny-DNN and then to XNOR-net.
The implementations on Tiny-DNN and Xnor-net use much lesser memory and computation space respectively than the caffe version and suited our primary motive of achieving real-time in portable systems.
Configured an FPGA-DAC interface to act as a signal generator. Programmed the FPGA to send in the data at required rate, configured the NCO and mixer to moulate the incoming bistream to required frequency and programmed the PLL to generate the required clocks.
I have recently taken up hiking as a welcome excuse to get outside during quarantine. The longest hike I have done till now was a gruelling 4.5ft 16 mile hike to the summit of Mount Timpanogos
Apart from working on my PhD Thesis and trying to publish top-notch papers, I am a huge enthusiast of E-Sports, especially Counter Strike: Global Offensive.
When forced indoors, I follow a number of crime-fiction genre movies, television shows and documentaries, or you can probably hear me trying to hone my skills in Classical Singing